The main challenge for power semiconductor devices is to achieve low on-resistance in the conduction mode and high sustaining voltage (or breakdown voltage) in the blocking mode. However, lower on-resistance can only be accomplished with a tradeoff in breakdown voltage (or vice versa) by using lower resistivity material in the drift region. In fact, doubling the breakdown voltage of a power semiconductor device typically results in as much as a five-fold increase in the on-resistance.
Much research has been done on super-junction, floating islands, and Oxide-Bypassed techniques to improve power device performance, but the need for an innovative and easy-to-manufacture technique to further increase the breakdown voltage without sacrificing on-resistance still remains.
For power semiconductor devices, low breakdown is usually caused by field bunching at some location such as at a junction curvature, device edge, or other corners. U.S. Pat. Nos. 5,204,545 and 5,334,546 to Terashima teach a technique of spreading electric field through multiple floating field plates by capacitive coupling to reduce field concentration. However, the technique is limited to a planar effect where electric field lines get spread out along the junction surface. Further, U.S. Pat. No. 6,246,101 to Akiyama and U.S. Pat. No. 5,233,215 to Baliga demonstrate the use of an isolation or termination structure at the device edge to improve breakdown voltage by spreading electric field lines in the isolation/termination structure, which contains numbers of floating field plates. It should be noted that all of these involve a field spreading technique at the device edge or termination, but not in active device region, where electric field lines remain crowded.
More recently, an Oxide-Bypassed technique has been developed to shape the electric field in the drift region. U.S. Pat. No. 6,452,230 (Boden), U.S. Pat. No. 6,608,350 (Kinzer et al.), and U.S. Pat. No. 6,774,434 B2 (Hueting et al.) are examples of this Oxide-Bypassed technique, with a field shaping region (e.g., poly in an oxide lined trench) physically connected to source metal, and in some cases to a drain electrode. The voltage along the poly is thus fixed. One of the main disadvantages is that the dielectric that separates the field-shaping region and the drift region has to be relatively thick in order to sustain the higher electric field in the dielectric (e.g., 3x for SiO2 than Si), which in turn increases cell pitch and reduces specific on-resistance. If the field-shaping region is physically connected to both the source and the drain, the device has to live with same level of leakage in the blocking state, which may not be tolerable for some applications.